[OpenWrt-Devel] OpenOCD and RT3050/5350

Discussion:

j***@gmail.com

2013-04-16 21:05:16 UTC

Does OpenOCD work right on the MIPS core in the RT3050/5350?
Does anyone have a script for initializing DRAM so that I can load in a
uboot binary?

I should be able to:
1) use JTAG to init DRAM
2) copy in the uboot
3) run it
4) use it to write itself to flash

I'm waiting for my hardware to come from China.

--
Jon Smirl
***@gmail.com

Drasko DRASKOVIC

2013-04-16 22:32:03 UTC

Permalink

Hi Jon,
both RT3050 and RT5350 have MIPS 24Kc core. I have successfully used
OpenOCD with similar (not exactly these) chips, having the same MIPS
core.

You should use MIPS 4K as a target.

At the time I used it extensively I tried to demystify a code that was
there and the code I contributed, so I crafted a doc that you can
refer to if you are stuck : http://openocd.zylin.com/#/c/904/ (I am
sending you a link to the patchset, although it should be merged in
the main tree. However, I do not see it there :
http://openocd.git.sourceforge.net/git/gitweb.cgi?p=openocd/openocd;a=tree;f=doc/manual;h=8a9121ca13b9286d258a420f4e301b84bad287b7;hb=08ddb19fd3a708d21057c88e8b86215e04c781ec)

Anyway, I can confirm that I was capable to load and JTAG debug both
low-level code and Linux, having FASTWRITE and I even added
coprocessor manipulations from command line (I added this for correct
cache handling, so now both soft and hard breaks should work fine).

I am very interested to see how this Chinese TOPLINK story develops.
Please keep us informed.

BR,
Drasko

Post by j***@gmail.com
Does OpenOCD work right on the MIPS core in the RT3050/5350?
Does anyone have a script for initializing DRAM so that I can load in a
uboot binary?
1) use JTAG to init DRAM
2) copy in the uboot
3) run it
4) use it to write itself to flash
I'm waiting for my hardware to come from China.
--
Jon Smirl
_______________________________________________
openwrt-devel mailing list
https://lists.openwrt.org/mailman/listinfo/openwrt-devel

j***@gmail.com

2013-07-04 22:35:52 UTC

Permalink

On Tue, Apr 16, 2013 at 6:32 PM, Drasko DRASKOVIC

Post by Drasko DRASKOVIC
Hi Jon,
both RT3050 and RT5350 have MIPS 24Kc core. I have successfully used
OpenOCD with similar (not exactly these) chips, having the same MIPS
core.
You should use MIPS 4K as a target.

I've bricked one of my AsiaRF modules and I'm trying to recover it.

For some reason reads over my JTAG are painfully slow. Writes as quick.

Takes 20 seconds....
mdw 0x80000198 200

Instant...
mww 0x80000198 200 0

Because reads are terribly broken it take 15 minutes to load uboot
into RAM since OpenOCD verifies the write.

Any idea why reads are so slow?

source [find interface/olimex-arm-usb-ocd.cfg]

set _CHIPNAME rt5350
set _ENDIAN little
set _CPUTAPID 0x1535024f

#daemon configuration
telnet_port 4444
gdb_port 3333

#jtag_speed
adapter_khz 2000

adapter_nsrst_delay 100
jtag_ntrst_delay 100

# jtag scan chain
# format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x3
-expected-id $_CPUTAPID

set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position
$_TARGETNAME

$_TARGETNAME configure -work-area-phys 0x80080000 -work-area-size 4096
$_TARGETNAME configure -event reset-init {
#reset
halt
echo "init SDRAM controller.."
mww 0x10000300 0xd1825282
mww 0x10000304 0xe0120300
# load_image /home/apps/u-boot/u-boot.bin 0x80000000 bin
# resume 0x80000000
}

reset_config trst_and_srst

Post by Drasko DRASKOVIC
At the time I used it extensively I tried to demystify a code that was
there and the code I contributed, so I crafted a doc that you can
refer to if you are stuck : http://openocd.zylin.com/#/c/904/ (I am
sending you a link to the patchset, although it should be merged in
http://openocd.git.sourceforge.net/git/gitweb.cgi?p=openocd/openocd;a=tree;f=doc/manual;h=8a9121ca13b9286d258a420f4e301b84bad287b7;hb=08ddb19fd3a708d21057c88e8b86215e04c781ec)
Anyway, I can confirm that I was capable to load and JTAG debug both
low-level code and Linux, having FASTWRITE and I even added
coprocessor manipulations from command line (I added this for correct
cache handling, so now both soft and hard breaks should work fine).
I am very interested to see how this Chinese TOPLINK story develops.
Please keep us informed.

I have the Toplink boards, but I am not so convinced that Toplink
wants to be in the module business.

I also have the AsiaRF AWM002. AsiaRF is much more interested is
getting OpenWRT going on their stuff.
http://www.asiarf.com/Smallest-Tiny-Ralink-802-11n-Wireless-AP-Router-Module-Board-AWM002-product-view-375.html

With 32MB/8MB the modules are around $8.50 Q1000. AsiaRF will sell Q1
for $15 and a dev carrier board for $30. Dev board exposes JTAG, both
UARTS, two Ethernet and USB.

Post by Drasko DRASKOVIC
BR,
Drasko

_______________________________________________
openwrt-devel mailing list
https://lists.openwrt.org/mailman/listinfo/openwrt-devel

--
Jon Smirl
***@gmail.com

Drasko DRASKOVIC

2013-07-04 23:32:08 UTC

Permalink

Hi Jon,

Post by j***@gmail.com
On Tue, Apr 16, 2013 at 6:32 PM, Drasko DRASKOVIC

Checkout FASTWRITE property of EJTAG, i.e. look in
mips_m4k_read_memory() and see if mips32_pracc_read_mem() gets called
and debug around that.

Timestamp in wait_for_pracc_rw() to see if you are waiting too long
for READY bit of EJTAG to gets set...

You cantake a look at the doc
http://repo.or.cz/w/openocd.git/blob/00d6925b41690df17f81ab3da2f37829d7095e19:/doc/manual/target/mips.txt
to understand a bit how it works...

Post by j***@gmail.com
#jtag_speed
adapter_khz 2000

Try playing with adapter_khz.

j***@gmail.com

2013-07-05 01:57:17 UTC

Permalink

On Thu, Jul 4, 2013 at 7:32 PM, Drasko DRASKOVIC

Post by Drasko DRASKOVIC
Hi Jon,

Post by j***@gmail.com
On Tue, Apr 16, 2013 at 6:32 PM, Drasko DRASKOVIC

Checkout FASTWRITE property of EJTAG, i.e. look in
mips_m4k_read_memory() and see if mips32_pracc_read_mem() gets called
and debug around that.
Timestamp in wait_for_pracc_rw() to see if you are waiting too long
for READY bit of EJTAG to gets set...
You cantake a look at the doc
http://repo.or.cz/w/openocd.git/blob/00d6925b41690df17f81ab3da2f37829d7095e19:/doc/manual/target/mips.txt
to understand a bit how it works...

Post by j***@gmail.com
#jtag_speed
adapter_khz 2000

Try playing with adapter_khz.

Drasko DRASKOVIC

2013-07-05 08:51:24 UTC

Permalink

32MB memory, 8MB flash. If you need 32MB flash they will pass along
for whatever the difference is in chip price.

Which then becomes more expensive than Carambola 2...

I'm starting to discover some the missing pieces in Ralink support.
Like no WifiDirect and no simultaneous (adhoc, AP). Looking at the
Ralink driver I don't see why they couldn't be added, but why isn't
Ralink doing the work?

This is also mystery to me. Too lazy, I guess. However, Carambola 1
has RT3050 and AP mode works quite fine - which proves that it is
absolutely possible.

I have found three AR9331 modules in the $10-12 range. But they are
all castellated, I would rather have one with pins. Any idea on the
Q1000 price for Carambo2 without VAT?

j***@gmail.com

2013-07-05 12:31:27 UTC

Permalink

On Fri, Jul 5, 2013 at 4:51 AM, Drasko DRASKOVIC

Post by Drasko DRASKOVIC

32MB memory, 8MB flash. If you need 32MB flash they will pass along
for whatever the difference is in chip price.

Which then becomes more expensive than Carambola 2...

This is also mystery to me. Too lazy, I guess. However, Carambola 1
has RT3050 and AP mode works quite fine - which proves that it is
absolutely possible.

I have found three AR9331 modules in the $10-12 range. But they are
all castellated, I would rather have one with pins. Any idea on the
Q1000 price for Carambo2 without VAT?

David Goodenough

2013-07-05 12:44:50 UTC

Permalink

Post by j***@gmail.com
On Fri, Jul 5, 2013 at 4:51 AM, Drasko DRASKOVIC

Post by Drasko DRASKOVIC

32MB memory, 8MB flash. If you need 32MB flash they will pass along
for whatever the difference is in chip price.

Which then becomes more expensive than Carambola 2...

This is also mystery to me. Too lazy, I guess. However, Carambola 1
has RT3050 and AP mode works quite fine - which proves that it is
absolutely possible.

I have found three AR9331 modules in the $10-12 range. But they are
all castellated, I would rather have one with pins. Any idea on the
Q1000 price for Carambo2 without VAT?