[OpenWrt-Devel] [PATCH] Atheros AR8035-A support

Discussion:

Philippe DUCHEIN

2015-10-29 11:52:02 UTC

This patch Atheros phy AR8035-A switch support

Signed-off-by: Philippe DUCHEIN <wireless-***@duchein.net>

—

diff -Nru a/target/linux/ar71xx/config-4.1 b/target/linux/ar71xx/config-4.1
--- a/target/linux/ar71xx/config-4.1 2015-10-27 18:57:41.379735223 +0100
+++ b/target/linux/ar71xx/config-4.1 2015-10-28 14:13:31.611494701 +0100
@@ -18,6 +18,7 @@
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_AT803X_PHY=y
+CONFIG_AR8035A_PHY=y
CONFIG_ATH79=y
CONFIG_ATH79_DEV_AP9X_PCI=y
CONFIG_ATH79_DEV_DSA=y
diff -Nru a/target/linux/ar71xx/patches-4.1/701-MIPS-ath79-openwrt-ar8035a.patch b/target/linux/ar71xx/patches-4.1/701-MIPS-ath79-openwrt-ar8035a.patch
--- a/target/linux/ar71xx/patches-4.1/701-MIPS-ath79-openwrt-ar8035a.patch 1970-01-01 01:00:00.000000000 +0100
+++ b/target/linux/ar71xx/patches-4.1/701-MIPS-ath79-openwrt-ar8035a.patch 2015-10-28 14:14:40.728361120 +0100
@@ -0,0 +1,163 @@
+diff -Nru a/drivers/net/phy/ar8035a.c b/drivers/net/phy/ar8035a.c
+--- a/drivers/net/phy/ar8035a.c 1970-01-01 01:00:00.000000000 +0100
++++ b/drivers/net/phy/ar8035a.c 2015-10-27 22:26:16.394744364 +0100
+@@ -0,0 +1,133 @@
++/*
++ * Driver for Atheros PHYs
++ *
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/delay.h>
++#include <linux/skbuff.h>
++#include <linux/phy.h>
++#include <asm/mach-ath79/ath79.h>
++
++/* Phy Specific status fields */
++#define ATHER_STATUS_LINK_MASK 0xC000
++#define ATHER_STATUS_LINK_SHIFT 14
++#define ATHER_STATUS_FULL_DUPLEX 0x2000
++#define ATHR_STATUS_LINK_PASS 0x0400
++#define ATHR_STATUS_RESOVLED 0x0800
++
++#define ATHR_PHY_SPEC_STATUS 17
++#define ATHR_DEBUG_PORT_ADDRESS 29
++#define ATHR_DEBUG_PORT_DATA 30
++
++static u16 debug0 = 0x14e;
++static u16 debug5 = 0x147;
++static u16 debug5_1000 = 0x0;
++
++static int ar8035_config_init(struct phy_device *phydev)
++{
++ phy_write(phydev, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
++ return 0;
++}
++
++static int ar8035_read_status(struct phy_device *phydev)
++{
++ int status;
++
++ status = phy_read(phydev, ATHR_PHY_SPEC_STATUS);
++ if (status < 0)
++ return status;
++
++ if ((status & ATHR_STATUS_LINK_PASS) && (status & ATHR_STATUS_RESOVLED)) {
++ phydev->link = 1;
++ } else {
++ phydev->link = 0;
++ }
++
++ if ( phydev->link ) {
++ if (status & ATHER_STATUS_FULL_DUPLEX)
++ phydev->duplex = DUPLEX_FULL;
++ else
++ phydev->duplex = DUPLEX_HALF;
++
++ status = ((status & ATHER_STATUS_LINK_MASK) >> ATHER_STATUS_LINK_SHIFT);
++ switch(status) {
++ case 0:
++ if ( phydev->speed != SPEED_10 ) {
++ phy_write(phydev, ATHR_DEBUG_PORT_ADDRESS, 0x0);
++ phy_write(phydev, ATHR_DEBUG_PORT_DATA, debug0);
++ phy_write(phydev, ATHR_DEBUG_PORT_ADDRESS, 0x5);
++ phy_write(phydev, ATHR_DEBUG_PORT_DATA, debug5);
++ phydev->speed = SPEED_10;
++ }
++ break;
++ case 1:
++ if ( phydev->speed != SPEED_100 ) {
++ phy_write(phydev, ATHR_DEBUG_PORT_ADDRESS, 0x0);
++ phy_write(phydev, ATHR_DEBUG_PORT_DATA, debug0);
++ phy_write(phydev, ATHR_DEBUG_PORT_ADDRESS, 0x5);
++ phy_write(phydev, ATHR_DEBUG_PORT_DATA, debug5);
++ phydev->speed = SPEED_100;
++ }
++ break;
++ case 2:
++ if ( phydev->speed != SPEED_1000 ) {
++ phy_write(phydev, ATHR_DEBUG_PORT_ADDRESS, 0x0);
++ phy_write(phydev, ATHR_DEBUG_PORT_DATA, debug0);
++ phy_write(phydev, ATHR_DEBUG_PORT_ADDRESS, 0x5);
++ phy_write(phydev, ATHR_DEBUG_PORT_DATA, debug5_1000);
++ phydev->speed = SPEED_1000;
++ }
++ break;
++ }
++ }
++
++ return 0;
++}
++
++
++static struct phy_driver ar8035_phy_driver = {
++ .phy_id = 0x004dd072,
++ .name = "Atheros AR8035A",
++ .phy_id_mask = 0xffffffff,
++ .features = PHY_GBIT_FEATURES,
++ .config_init = ar8035_config_init,
++ .config_aneg = genphy_config_aneg,
++ .read_status = ar8035_read_status,
++ .driver = {
++ .owner = THIS_MODULE,
++ },
++};
++
++static int __init atheros_phy_init(void)
++{
++ if ( ath79_soc == ATH79_SOC_AR7130 ||
++ ath79_soc == ATH79_SOC_AR7141 ||
++ ath79_soc == ATH79_SOC_AR7161 ) {
++ debug0 = 0x82EE;
++ debug5 = 0x2D47;
++ debug5_1000 = 0x2D47;
++ }
++ return phy_driver_register(&ar8035_phy_driver);
++}
++
++static void __exit atheros_phy_exit(void)
++{
++ phy_driver_unregister(&ar8035_phy_driver);
++}
++
++#ifdef MODULE
++module_init(atheros_phy_init);
++module_exit(atheros_phy_exit);
++#else
++subsys_initcall(atheros_phy_init);
++#endif
++
++MODULE_DESCRIPTION("Atheros PHY AR8035A driver");
++MODULE_LICENSE("GPL v2");
++
+diff -Nru a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
+--- a/drivers/net/phy/Kconfig 2015-10-27 22:09:31.594873738 +0100
++++ b/drivers/net/phy/Kconfig 2015-10-27 22:22:53.269344400 +0100
+@@ -157,6 +157,11 @@
+ select ETHERNET_PACKET_MANGLE
+ select SWCONFIG
+
++config AR8035A_PHY
++ tristate "Driver for Atheros AR8035A switches"
++ ---help---
++ Supports the AR8035A PHY.
++
+ config AR8216_PHY_LEDS
+ bool "Atheros AR8216 switch LED support"
+ depends on (AR8216_PHY && LEDS_CLASS)
+diff -Nru a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
+--- a/drivers/net/phy/Makefile 2015-10-27 22:09:31.594873738 +0100
++++ b/drivers/net/phy/Makefile 2015-10-27 22:27:44.515785566 +0100
+@@ -31,6 +31,7 @@
+ obj-$(CONFIG_RTL8367_PHY) += rtl8367.o
+ obj-$(CONFIG_RTL8367B_PHY) += rtl8367b.o
+ obj-$(CONFIG_LSI_ET1011C_PHY) += et1011c.o
++obj-$(CONFIG_AR8035A_PHY) += ar8035a.o
+ obj-$(CONFIG_PSB6970_PHY) += psb6970.o
+ obj-$(CONFIG_B53) += b53/
+ obj-$(CONFIG_FIXED_PHY) += fixed_phy.o

Conor O'Gorman

2015-10-30 12:50:55 UTC

Permalink

Post by Philippe DUCHEIN
This patch Atheros phy AR8035-A switch support
—
diff -Nru a/target/linux/ar71xx/config-4.1 b/target/linux/ar71xx/config-4.1
--- a/target/linux/ar71xx/config-4.1 2015-10-27 18:57:41.379735223 +0100
+++ b/target/linux/ar71xx/config-4.1 2015-10-28 14:13:31.611494701 +0100
@@ -18,6 +18,7 @@
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_AT803X_PHY=y
+CONFIG_AR8035A_PHY=y

I believe this is already in the at803x code.
#define ATH8035_PHY_ID 0x004dd072

Philippe DUCHEIN

2015-10-30 14:25:02 UTC

Permalink

Hi Conor,
yes, but at803x code, there is 20% of lost packets… clock delay is incorrect into at803x file

Post by Conor O'Gorman

I believe this is already in the at803x code.
#define ATH8035_PHY_ID 0x004dd072

Conor O'Gorman

2015-10-30 14:36:19 UTC

Permalink

Post by Philippe DUCHEIN
Hi Conor,
yes, but at803x code, there is 20% of lost packets… clock delay is incorrect into at803x file

That clock delay is generally dependent on the board. It is passed as
platform data for the driver. See "struct at803x_platform_data" in the
ath79 mach files.

Conor

Christian Lamparter

2015-10-30 14:45:47 UTC

Permalink

Post by Philippe DUCHEIN
Hi Conor,
yes, but at803x code, there is 20% of lost packets… clock delay is incorrect into at803x file

then why don't you edit the existing at803x.c code instead?

Note:
- WD Range extender has a AR8035 chip (older chip - but same ID).
- Openmesh OM5P-AN has a AR8035 chip (older chip - but same ID).
- Cisco MR18 also has a AR8035-A chip (same chip - same phy ID
altought Cisco calls it the AR8033).

The WD Range extender and OM5P-AN are already supported
by openwrt for some time and each has their own set of
quirks for the AR8035. So you could do the same and introduce
a flag in the platform code and add the necessary quirk
function into at803x.c.

Regards
Christian

Philippe DUCHEIN

2015-10-30 14:48:28 UTC

Permalink

Thank you Christian,
I’ll do like that

Post by Christian Lamparter

Post by Philippe DUCHEIN
Hi Conor,
yes, but at803x code, there is 20% of lost packets… clock delay is incorrect into at803x file

then why don't you edit the existing at803x.c code instead?
- WD Range extender has a AR8035 chip (older chip - but same ID).
- Openmesh OM5P-AN has a AR8035 chip (older chip - but same ID).
- Cisco MR18 also has a AR8035-A chip (same chip - same phy ID
altought Cisco calls it the AR8033).
The WD Range extender and OM5P-AN are already supported
by openwrt for some time and each has their own set of
quirks for the AR8035. So you could do the same and introduce
a flag in the platform code and add the necessary quirk
function into at803x.c.
Regards
Christian